1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device for mounting a high-frequency element.
2. Description of the Prior Art
One of high-frequency elements, such as GaAs compound semiconductor has attracted public attention as a material suited to high-frequency devices, and semiconductor devices for high-frequency amplification using GaAs compound semiconductor have been developed. In order to make possible the use of such semiconductor devices for high-frequency amplification in higher frequency bands, the improvement of gain in high-frequency bands is important.
To achieve this, the improvement of FET elements themselves have been performed. The improvement in gain of FET elements has been achieved by the reduction of gate-source capacitance Cgs by decreasing the gate length Lg, the increase of mutual conductance gm, and the reduction of drain conductance gd and gate-drain capacitance Cgd using offset gate structures.
FIG. 6 is a plan of the case in which a conventional FET element is packaged.
The FET element 1 is mounted on the source metalized pattern 6 of the case 12, and by bonding wires 5, the source electrode 4 is interconnected with the source metalized pattern 6, the gate electrode 2 is interconnected with the gate metalized pattern 7, and the drain electrode 3 is interconnected with the drain metalized pattern 8. Furthermore, metalized pattern 6, 7 and 8 are connected to the source terminal 9, the gate terminal 10 and the drain terminal 11, respectively. A bias voltage is impressed to these terminals 9, 10 and 11 to drive the FET element 1.
A GaAs field effect transistor (FET) is used as the FET element 1, and Al.sub.2 O.sub.3 is used as the material for the case 12. The metalized pattern are formed of metalized W (tungsten) Ni plated, silver paste, Ni plated and Au plated. When the FET mounts on the source pattern 6 by silver paste, a metal 13 is used for preventing silver paste from flowing.
In the semiconductor package shown in FIG. 5, a desired gain is not achieved when used in high-frequency bands.
The methods for improving FET elements themselves described above have problems that decrease in the gate length Lg is difficult to control and has fluctuation, and that when an offset gate structure is employed, the accurate alignment is difficult, and by such methods, it is difficult to achieve the sufficient gain property improvement effect stably in the present mass-production technology level.
It is an object of the present invention to provide a semiconductor package having an increased a parasitic capacitance between the drain and a ground (GND).